The rapid technology development in the IC industry leads to an ever increasing complexity in the IC structure and architecture, which obviously increases fabrication costs. At the same time, manufacturers are compelled to steadily reduce the wholesale prices of these manufactured chips due to the competitive nature of the IC market and the short life-span of the manufactured chips consequent to the introduction of new and more advanced designs to the market.
This situation has stimulated the development of a multitude of testing procedures in order to maintain a high so called yield score. "Yield", in this connection, relates to the percentage of dies produced in a batch which are fault-free in that no failures are detected by the completion of manufacture. Thus, from the point of view of manufacture, the yield criterion relates to the various design rules, process equipment, particle counts, process-induced defects, and IC sizes and densities. (It is assumed that the wafer material either contains local imperfections before the start of the fabrication process or acquires such imperfections during fabrication.) In some cases, a decrease of only a few percent in the yield score can make an otherwise profitable IC production line into a losing one.
Accordingly, it is customary to perform inspection and review of the wafers during production. Generally, the inspection is performed after critical steps in the manufacturing process, i.e., such steps that are known or prone to create defects. In the wafer inspection stage, an advanced inspection tool (e.g. WF-7xx series commercially available from Orbot Instruments Inc., Israel), scans the wafer under inspection and employs sophisticated computational techniques to map suspected defect locations on the wafer.
The map of defects, as delivered from the wafer inspection tool, is sent to a review tool, Generally comprising an optical or scanning microscope (SEM). The latter utilizes high resolution imaging in order to classify the mapped defects into either valid or false defects (e.g., locations marked suspect due to an overly high inspection resolution).
The inspection and review tools currently in use are the so-called "stand-alone" type. The "stand-alone" approach suffers from some significant shortcomings, the most prominent of which is "time to results." That is, the inspection phase is normally applied to a cassette of wafers and not to individual wafers. Thus, a cassette that includes a plurality of wafers, say 25, is loaded into the inspection tool for inspection. Only after the inspection tool completes inspecting all the wafer in the cassette (or has sampled a designated number of the wafers), the cassette is loaded into the review tool along with the computer file which includes the defect map. This results in slowing down the operation since an entire cassette (or the sampled wafers stored therein) must be inspected before the first wafer undergoes the review stage. It is generally known that such process takes, as a rule, over five hours.
Moreover, the additional handling of the cassette between the inspection and review stations is an additional source for defects. This mode of operation is referred to herein as "cassette inspection-review cycle."
Operation in cassette inspection-review cycle as well as the prolonged delay between the inspection and review stages (which often necessitates a dedicated, proficient operator for loading and unloading cassettes onto the inspection tool, physically conveys the cassettes and loads them into the review tool), significantly slows down the inspection-review cycle with the inevitable result of being delayed in the detection of faults in the wafers. Moreover, any additional defects introduced during the transfer of the cassette will not be documented, since the review station will review only location identified as suspect by the inspection tool. The recent introduction of pods that replace the conventional cassettes poses yet a further complication in carrying out the loading/unloading procedures as described above.
Another approach is described in U.S. Pat. No. 5,699,447, to Alumot which is assigned to the assignee of the present Application. In the cited patent, a system is described which enables a "per wafer" inspection and review. Specifically, an integrated system is described which comprises both an inspection and review capabilities in a single tool. Thus, a cassette is loaded and the first wafer enters the system. The system first performs an inspection routine and creates a defect map. Without ejecting the wafer, the system then proceeds to the review routine in an increased magnification and/or sensitivity using the created defect map.
It should be appreciated that, in the stand-alone mode of operation, the inspection and review phases can be activated simultaneously in a pipe-line approach. Thus, when the review phase is conducted in respect of a first wafer from one cassette, a different wafer from a different cassette can undergo the inspection phase simultaneously. In contrast, the "integrated" tool is characterized by a serial mode of operation. In other words, when an already inspected wafer is processed in the review module, the corresponding inspection module is put on a stand-by mode. From a cost perspective, if a single wafer is inspected for 8 minutes in a high-end $2 million worth inspection module and is then subject to review for a period of T seconds (T=I*N, N standing for the number of defects that were revealed in the inspection phase; I standing for the review period of a defect, in seconds) in a $400,000 worth review module (say, an optical microscope), it readily arises that for say, 200 defects (i.e. N=200) and I=3, the very expensive inspection module is put on standby for 10 minutes, during which more than one wafer could have been inspected. This is a very significant limitation which, in many FAB's, is unacceptable.
Moreover, the known "integrated" systems are characterized in an inflexible configuration in the sense that the integrated systems comprise inspection and review tools of the same type, generally optical microscopes. Thus, the review is enabled simply by increasing the magnification and/or sensitivity of the system. This is basically similar to the known method of using a lab microscope, wherein the subject is first acquired using low magnification, and then inspected using higher magnification simply by rotating an objective lens turret having lenses of various magnifications.
However, it should be appreciated that many times simply increasing the magnification is insufficient and, indeed, it is customary to follow up an inspection in such an "integrated" system by using an additional tool of a different character, such as an SEM. The inflexible configuration constitutes, thus, significant shortcomings.
There is, accordingly, a need in the art to provide a tool for inspection and review of wafers which substantially reduces or overcomes the drawbacks associated with stand-alone inspection review sequence and with hitherto known "integrated" systems.